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Stencil designs that preclude solder paste from entering the PTH also result in a significant reduction of solder paste on the top surface and in the PTH. These reductions may make the pin-in-paste technique impractical for some boards. If the solder volume is too low, the available solder distributes unevenly around the PTH pin and the PTH barrel, resulting in voids and inferior solder joints (see Fig. 47.18a, b). A normal incident x-ray will highlight circumferential voids in PTHs, as evidenced in Fig. 47.19. 47.3.11.3 Pin-in-Paste on Thick Boards. Since the solder volume increases proportionately with increasing board thickness, pin-in-paste soldering is best suited for thin PWBs ( 1.6 mm). The technique is limited by available solder and required solder volume for proper barrel fill. There are two ways to deal with the added volume.

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FIGURE 47.19 A normal incident x-ray photo of a connector. The light spots around the pins are areas of no solder or voids (reduced solder thickness). (Courtesy of Hewlett-Packard).

From Figure 89, it can be seen that different aspects of natural science, such as electrochemistry, electrohydrodynamics, molecular biology, plasma physics, scaling laws, quantum physics and molecular physics, are related to the design and the manufacture of microsystems in one way or another In addition, mechanical engineering, electrical engineering, chemical engineering, materials engineering and industrial engineering principles are related to the design, manufacture and the packaging of microelectromechanical systems [6] Hsu s chart (Figure 89) [6] shows that scaling laws are obviously important MacDonald s analysis [8] is also discussed here There are generally two types of scaling laws that are applicable to the design of microsystems, namely, scaling of the geometry and scaling of the phenomenological

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FIGURE 47.20 Application of solder pre-form foil washer to augment pin-in-paste solder volume. Note that the flux from the solder paste is sufficient for pre-form soldering.

473114 Addition of Solder through Pre-Forms Solder foil pre-forms (stamped solder foil) can be added to through-hole parts to augment solder volume (see Fig 4720) This approach is expensive and application of the pre-forms is tedious and time-consuming 473115 Buried Intrusive Method There is a new method for formation of a somewhat nonstandard solder joint in thick PWBs2 A foreshortened pin, on the order of that used for a board 16 mm in thickness, is used in the thick board So, too, solder volume is treated as if for a board 16 mm thick When the solder melts, it coalesces and wets to the pin and barrel as in any through-hole soldering process Conventional thinking would have the molten solder running through the barrel and out the bottom side of the board.

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Instead, nearly all the solder is retained by surface tension forces around pin and barrel If the solder volume is calculated properly and aptly delivered, there is 100 percent pin wetting both longitudinally and circumferentially (see Fig 4721) Accelerated thermal cycling followed by tensile testing has shown that resultant solder-joint reliability is sufficient and equivalent to conventionally formed pinin-paste or wave-soldered joints of twice the pin-wetted length 473116 Temperature Compatibility If pin-in-paste soldering is to be used, check that components are temperature-compatible with the oven reflow process The high temperatures and long exposures associated with oven reflow soldering may cause unsuited molded component bodies to melt or warp Connector contact normal force may be affected if the molded connector body softens or distorts.

Solder joints or wire bonds internal to some devices may become disbanded, and some, such as electrolytic capacitors, may leak or even explode as a result of an oven reflow cycle Check the component manufacturer s specification for thermal limits and compatibility with oven reflow soldering..

The first bit that is clocked in is D7 To begin the conversion, D7 needs to be set to 1 , as can also be seen from the value of the control byte that we calculated So Din is set to 1 and the first SCLK rising edge is applied to the ADC The SCLK is then taken low Thereafter, the Din is set to each of the subsequent bits of the control byte before applying the SCLK At the end of 8 SCLK pulses, the Din bit is not required and is set to 0 At the falling edge of the 8th SCLK pulse, the ADC sets the SSTRB bit to 1 At the falling edge of the 9th SCLK bit, SSTRB is taken to 0 .

FIGURE 47.21 Cross-sectional micrograph showing pin-in-paste buried intrusive soldering. Note that very little solder has drained.

Fig 89: Various disciplines related to the design and the manufacture of microsystems as defined by Hsu, of

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